ISCA 2026 Workshop
SKYLINE: Rethinking the Cloud-Native Stack From Hardware to Software
A cross-layer conversation on new abstractions, platforms, and design principles for cloud-native computing.
About the Workshop
Cloud computing is undergoing a radical transformation driven by cloud-native paradigms such as microservices and serverless computing. These paradigms enable developers to build applications by composing fine-grained, short-lived services that benefit from simplified programming models and usage-based billing. However, cloud-native workloads differ profoundly from traditional monolithic applications: they exhibit bursty invocation patterns, frequent I/O and context switches, significant auxiliary "datacenter tax" operations like serialization and encryption, and strict tail-latency requirements. When executed on conventional servers and software stacks designed for a previous era of computing, these characteristics lead to severe inefficiencies in performance, energy, and resource utilization — undermining the very promise of cloud-native computing.
This workshop presents a vertically integrated, hardware-software co-design approach to rethinking the entire cloud-native stack. Rather than focusing on isolated optimizations, we show how jointly redesigning processor architectures, hardware accelerators, system software, and resource management layers unlocks orders-of-magnitude improvements in efficiency. The workshop spans CPU designs for latency-critical services, accelerator architectures that offload pervasive datacenter tax overheads, runtime and scheduling techniques for bursty and ephemeral workloads, and energy-aware management strategies that balance performance with power constraints. We also examine how the rapid rise of ML-driven workloads is stressing existing cloud infrastructure and motivating new cross-layer designs. The workshop features invited keynote talks from industry and academia and concludes with a panel discussion on open challenges and future directions in cloud-native system design.
Talks Schedule & Invited Speakers
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Organizers
Jovan Stojkovic is an incoming assistant professor in the Computer Science Department at the University of Texas at Austin. Currently, he is a visiting researcher at Meta. Jovan holds a Ph.D. from the University of Illinois at Urbana-Champaign. Jovan's research interests are in computer architecture and systems for cloud and datacenter computing. He is the author of multiple papers published at top-tier computer architecture conferences such as ISCA, HPCA, MICRO, and ASPLOS, and holds six patents for his work with Microsoft and IBM on serverless computing, overclocking in the cloud, and AI datacenter design. His research has been recognized with accolades, including: David J. Kuck Outstanding PhD Thesis Award, HPCA Best Paper Award, IEEE Micro Top Pick Honorable Mention, W. J. Poppelbaum Memorial Award, Kenichi Miura Award, and an invitation to speak at the Heidelberg Laureate Forum.
Josep Torrellas is the Thomas M. Siebel Chair in Computer Science at the University of Illinois at Urbana-Champaign (UIUC). He is the Director of the ACE Center for Evolvable Computing (an SRC/DARPA JUMP 2.0 Center), past Co-Leader of an Intel Strategic Research Alliance (ISRA) on Computer Security, and past Director of the Illinois-Intel Parallelism Center (I2PC). His research interests are multiprocessor computer architectures and parallel computing. Some of his contributions include thread-level speculation (TLS) architectures, the Bulk Multiprocessor concept, deterministic record and replay mechanisms, process variation mitigation techniques, and hardware defenses against speculative execution attacks. In addition, he has contributed to several experimental multiprocessor designs such as IBM's PERCS Multiprocessor, Intel's Runnemede Extreme-Scale Multiprocessor, Illinois Cedar, and Stanford DASH. Among other awards, Torrellas has graduated 52 PhDs. He received a PhD from Stanford University.
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